Research Papers
Patents
Research Papers
A low-power edge detection image sensor based on parallel digital pulse computation
Lee, C.; Chao, W.;Lee, S.;Hone, J.;Molnar, A.;Hong S.H.;
Circuits and Systems II:Express Briefs, IEEE Transactions on
Volume 62, Issue 11, Nov. 2015, Page(s):1043-1047
Double-side CMOS-CNT biosensor array with padless structure for simple bare-die measurements in a medical environment
Ahn, J.;Lim, J.;Kim, S.-H.;Yun, J.-Y.; Kim, C.;Hong, S.-H.;Lee M.-J.;Park Y.;
Solid-State Circuits Conference, 2015 IEEE International
session 16.6, Feb. 2015, page(s) 1-3
Dynamic ternary cam for hardware search engine
Vinogradov, V.; Ha J.; Lee, C.; Molnar, A.; Hong S.H.;
Electronics Letters
Volume 50, Issue 4, Feb. 2014, Page(s):256-258
Integrated system of face recognition and sound localization for a smart door phone
Kim, T.; Park, H.S.; Hong, S.H.; Chung Y.M.;
Consumer Electronics, IEEE Transactions on
Volume 59, Issue 3, Aug. 2013, Page(s): 598-603
Area-power efficient lighting unit architecture based on hardware sharing
Rios, M.A.; Hong, S.H.;
Electronics Letters
Volume 48, Issue 12, Jun. 2012, Page(s): 681-682
A fully integrated HF-band passive RFID tag IC using 0.18um CMOS technology for low cost security applications
Lee, J.-W.; Vo, D.H.T.; Huynh, Q.-H.; Hong, S.H.;
Industrial Electronics, IEEE Transactions on
Volume 58, Issue 6, Jun. 2011, Page(s) : 2531-2540
A decoupled 4T dynamic CAM suitable for high density storage
Chae, M.; Lee, J.-W.; Hong, S.H.;
Electronics Letters
Volume 47, Issue: 7, Mar. 2011, Page(s): 434-436
A hardware framework for smart speaker control of home audio network
Kim, T.; Hong, S.H.; Chung, Y.;
Consumer Electronics, IEEE Transactions on
Volume 56, Issue 4, Nov. 2010, Page(s): 2506-2510
Adaptive ultrasonic distance measurement technique for handwriting digitization using reconfigurable analog blocks
Han, C.H.; Chung, J.; Hong, S.H.;
Instrumentation and Measurement, IEEE Transactions on
Volume 59, Issue 8, Aug. 2010, Page(s): 2240-2242
Intra- and inter-temperature measurement BIST for SiP module using digital frequency analyzer circuit
Han, C.H.; Lee, J.-W.; Hong, S.H.;
Electronics Letters
Volume: 45, Issue: 24, Nov. 2009, Page(s): 1221-1223
Compact wide bandwidth dual-port DRAM architecture suitable for mobile multimedia processors
Hong, S.;
Electronics Letters
Volume 43, Issue 19, September 13 2007 Page(s):1017-1018
Robust Tracking of Ultrasonic Pen for Handwriting Digitizer Applications
Lee, J.; Hong, S.H.; Chung, Y.;
Consumer Electronics, IEEE Transactions on
Volume 53, Issue 3, Aug. 2007 Page(s): 1098-1102
Reducing the Overhead of Real-Time Operating System through Reconfigurable Hardware
Song, Moonvin; Hong, Sang Hoon; Chung, Yunmo;
Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on
29-31 Aug. 2007 Page(s):311 - 316
A Low Power 128Mb Pseudo SRAM Using Hyper Destructive Read Architecture
Jin-Hong Ahn; Sang Hoon Hong; Jae-Bum Ko; Se Jun Kim; Sung-Won Shin; Hee-Bok Kang; Jae-Jin Lee; Joong-Sik Kih;
Asian Solid-State Circuits Conference, 2005
Nov. 2005 Page(s):113-116
An experimental 256 Mb non-volatile DRAM with cell plate boosted programming technique
Ahn, J.-H.; Hong, S.-H.; Kim, S.-J.; Ko, J.-B.; Shin, S.-W.; Lee, S.-D.; Kim, Y.-W.; Lee, K.-S.; Lee, S.-K.; Jang, S.-E.;
Choi, J.-H.; Kim, S.-Y.; Bae,
G.-H.; Park, S.-W.; Park, Y.-J.;
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
15-19 Feb. 2004 Page(s):42-512 Vol.1
A low jitter, fast recoverable, fully analog DLL using tracking ADC for high speed and low stand-by power DDR I/O interface
Se Jun Kim; Sang Hoon Hong; Jae-Kyung Wee; JIn Hong Ahn; Jin Young Chung;
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
12-14 June 2003 Page(s):285-286
Low-voltage DRAM sensing scheme with offset-cancellation sense amplifier
Sanghoon Hong; Sejun Kim; Jae-Kyung Wee; Seongsoo Lee;
Solid-State Circuits, IEEE Journal of
Volume 37, Issue 10, Oct. 2002 Page(s):1356-1360
A low-jitter wide-range skew-calibrated dual-loop DLL using antifuse circuitry for high-speed DRAM
Se Jun Kim; Sang Hoon Hong; Jae-Kyung Wee; Joo Hwan Cho; Pil Soo Lee; Jin Hong Ahn; Jin Yong Chung;
Solid-State Circuits, IEEE Journal of
Volume 37, Issue 6, June 2002 Page(s):726-734
An offset cancellation bit-line sensing scheme for low-voltage DRAM applications
Sang Hoon Hong; Si Hong Kim; Se Jun Kim; Jae-Kyung Wee; Jin Yong Chung;
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Volume 1, 3-7 Feb. 2002 Page(s):154-455 vol.1
An embeddable low power SIMD processor bank
Sang Hoon Hong; Woodward Yang;
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
7-9 Feb. 2000 Page(s):192-193, 457
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Patents
Minah Chae, Chang Hoon Han, and Sang Hoon Hong, "Binary content addressable memory", US Pat.8400802, Mar. 19, 2013
Sang Hoon Hong, “Semiconductor Memory Device for Simultaneously Performing Read Access and Write Access”, US Pat.7679970, Mar.13, 2010
Jae-Bum Ko, Jin-hong Ahn, Sang Hoon Hong et al., “Semiconductor memory device having tag block for reducing initialization time”, US Pat.7363460, Apr.22, 2008
Jae-Bum Ko, Sang Hoon Hong et al., "Semiconductor memory device with uniform data access time", US Pat.7304877, Dec. 4, 2007
Jin-hong Ahn, Sang-Hoon Hong et al.,” Apparatus and method of driving non-volatile DRAM”, US Pat.7224609, May 29, 2007
Sang Hoon Hong et al. “Semiconductor memory device for enhancing refresh operation in high speed data access”, US Pat. 7174418, Feb 6, 2007
Jin-Hong Ahn, Sang Hoon Hong et al “Non-volatile dynamic random access memory”, US Pat. 7099181, Aug.29 2006
Jae-Bum Ko et al., ”Semiconductor memory device for high speed access”, US Pat. 7088637, Aug. 8, 2006
Se Jun Kim, Sang Hoon Hong et al., ” Analog delay locked loop having duty cycle correction circuit”, US Pat. 7078949, Jul. 18, 2006
Se Jun Kim and Sang Hoon Hong et al., “Semiconductor memory device having optimum refresh cycle according to temperature variation”, US Pat.7075847 Jul. 11, 2006
Sang Hoon Hong et al., “Semiconductor memory device for controlling cell block with state machine”, US Pat. 7068561, Jun 27, 2006
Sang Hoon Hong et al., “Semiconductor memory device with efficient multiplexing of I/O pad in multi-chip package”, US Pat.7057964 Jun 6, 2006
Jin-Hong Ahn, Sang-Hoon Hong et al.,”Driving circuit for non-volatile DRAM”, US Pat.7054201, May 30, 2006
Jin-Hong Ahn, Sang Hoon Hong et al., “Apparatus and method of driving non-volatile DRAM”, US Pat. 6996007, Feb 7, 2006
Se Jun Kim, Sang Hoon Hong et al., “Analog delay locked loop with tracking analog-digital converter”, US Pat. 6987409, Jan 17, 2006
Jin-Hong Ahn, Sang-Hoon Hong et al., “Semiconductor memory device with reduced data access time”, US Pat. 6,937,535 Aug 30, 2005
Jin-Hong Ahn, Sang-Hoon Hong et al., “Semiconductor memory device capable of accessing data in continuous burst mode regardless of location of accessed data”, US Pat. 6,930,951 Aug 16, 2005
Se-Jun Kim, Sang-Hoon Hong et al., “Analog-to-digital converter”, US Pat. 6,930,630 Aug. 16, 2005
Sang-Hoon Hong et al., “Duty cycle correction circuit and delay locked loop having the same”, US Pat. 6,859,081 Feb 22, 2005
Sang Hoon Hong et al., “Semiconductor memory device”, US Pat. 6,757,210 Jun. 29, 2004
Se Jun Kim and Sang Hoon Hong, “Delay circuit of clock synchronization device using delay cells having wide delay range”, US Pat. 6,686,788, Feb 3, 2004
Sang Hoon Hong and Si Hong Kim, “Semiconductor memory device, and method of testing the same”, US Pat. 6,650,581 Nov. 18, 2003
Se Jun Kim and Sang Hoon Hong, “Clock synchronization device”, US Pat. 6,597,298 Jul 22, 2003
Si Hong Kim and Sang Hoon Hong, “Semiconductor memory device having sense amplifier and method for driving sense amplifier”, US Pat. 6,466,501 Oct 15, 2002
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